A conventional bipolar transistor is illustrated in FIG. 1. PNP bipolar transistor has same structure as NPN bipolar transistor, with only reverse impurity type of every parts of device. NPN bipolar transistor is illustrated here as example. N type heavily doped region 11 is above p type substrate 10. N type epitaxy layer 12 (doping level is lower than buried layer 11, normally medium or low doped) is above heavily doped n buried layer 11. There are a few shallow trench isolation (STI) structures 13a/13b/13c/13d among n type epitaxy layer 12. The bottom of these STI is in contact with buried layer 11. N type heavily doped region 14 exists between STI 13a/13b or 13c/13d inside epitaxy layer 12, which is used as collector reach through (sinker). P type base 15 is on top of n type epitaxy layer 12. Base 15 is semiconductor material, such as silicon, silicon germanium alloy, etc. It is connected to base pick up B. Heavily doped emitter poly 16 is on top of base 15. It is connected to emitter pick up E. In all, n type emitter 16, p type base 15, n type epitaxy layer 12 and n type buried layer 11 formed NPN bipolar transistor vertically.
In bipolar transistor illustrated in FIG. 1, n type epitaxy layer 12 between STI 13b and 13c is collector of the bipolar transistor. The collector picks up to C through n type heavily doped buried layer 11 (collector buried layer) and n type heavily doped sinker 14. The collector buried layer area is large by this approach. Consequently the parasitic capacitance with substrate is also large. A deep trench isolation structure 130a/130d is commonly formed under STI 13a/13d which surround entire bipolar transistor. Deep trench isolation structure 130a/130d extend through n type heavily doped buried layer 11 until inside p type substrate 10. It cuts through n type heavily doped layer 11, in order to reduce junction area of collector buried layer to p type substrate 10, and reduce parasitic capacitance between them.
FIG. 1 is only illustration of a bipolar transistor. There may be variations of each portion during real manufacturing.
Following process steps are normally adopted for collector and buried layer of above mentioned bipolar transistor:
Step 1: n type impurity is ion implanted into p type substrate. The commonly used n type impurities are Phosphorus (P), Arsenic (As), Antimony, etc. N type heavily doped buried layer 11 is formed then.
Step 2: N type epitaxy layer 12 is grown (deposit one layer of n type single crystal 12) on top of n type heavily doped buried layer 11. The doping level of 12 is lower than heavily doped buried layer 11.
Step 3: Shallow trench was etched inside silicon. The depth of shallow trench is normally below 2 um. The position of shallow trench is shown in FIG. 1 as 13a/13b/13c/13d. 
A deep trench is then etched at the bottom of STI which encloses entire bipolar transistor. The depth of deep trench is normally more than 7 um. The position of deep trench is indicated as 130a/130d in FIG. 1.
Dielectric such as silicon (SiO2) is then filled into shallow trench. The shallow trench isolation structures 13a/13b/13c/13d are formed.
N type epitaxy layer 12 between STI 13b/13c is the collector.
There are a few disadvantages of this approach of forming collector and buried layer of above bipolar transistor. First, the cost of growing n type single crystal 12 on top of silicon substrate 12 is high. Second, the depth of deep trench isolation structure 130a/130d is more than 7 um. Etch and fill in process are complex and expensive.